SEGGER Evaluation Software for IAR LPC2148
Data Sheets
IAR LPC2148
- Audio circuit with microphone jack and headphone jack
- Trace (MICTOR) connector mounted
- Two UARTs with drivers and DB9 connectors
- USB connector
- ETM routing
- Potentiometer connected to the ADC
- Two buttons
- One LED
- 2 x 16 LCD
- 20-pin JTAG interface connector
- SD connector for external memory
- 13x36 through hole prototyping area
- Ready to run code example exercising on-chip peripherals
- Complete API for LCD
- Schematics included
- RoHS compliant
LPC2148FBD64 (NXP)
- 32/16-bit RISC architecture (ARM v4T)
- 32-bit ARM instruction set for maximum performance and flexibility
- 16-bit Thumb instruction set for increased code density
- Unified bus interface, 32-bit data bus carries both instructions and data
- Three-stage pipeline
- 32-bit ALU
- Small die size and low power consumption
- Coprocessor interface
- Extensive debug facilities:
- EmbeddedICE-RT real-time debug unit
- JTAG interface unit
- Interface for direct connection to Embedded Trace Macrocell(ETM)